Latch-up test contract service

Added to bookmarks
Bookmarks list

Bookmark has been removed
Bookmarks list

You can't add any more bookmarks

By registering as a member, you can increase the number of bookmarks you can save and organize them with labels.
Free membership registration

last updated：Dec 29, 2020

アイテス

Official site

We provide latch-up test services to evaluate the resistance of CMOS ICs and semiconductor products containing them to latch-up destruction.

■ We support products such as IC modules, electronic components, and subsystems with up to 512 pins. ■ We provide testing that complies with major domestic and international standards such as JEDEC, JEITA, and AEC. ■ We propose and conduct tests tailored to our customers' requests and objectives. ■ In the event of any issues with reliability, we assist with failure analysis and root cause investigation to resolve the problem.

Related Link - https://www.ites.co.jp

Inquire About This Product

basic information

■ Current pulse application method (JEDEC, JEITA, AEC) ■ Power supply overvoltage method (JEDEC, JEITA, AEC) ■ Voltage pulse application method (AEC) ■ ESD pulse application method (reference test) ■ Latch-up determination method (JEDEC method, current definition method) ■ Also supports measurement of protection diode characteristics before and after testing. ■ Also supports arrangement of sockets, dedicated boards, and production of test boards. * Number of VCC power supplies: 4 units (100V/0.5A: 1 unit, 50V/1A: 3 units) Capable of supporting multi-power supply devices * Maximum voltage for power supply overvoltage method: 150V (VCC voltage + VT pulse voltage ⇒ maximum 150V)