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  6. UDP 10G IP core for FPGA

UDP 10G IP core for FPGA

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UDP10G-IP

last updated:Feb 13, 2019

デザイン・ゲートウェイ
デザイン・ゲートウェイ
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Achieving 10Gbps UDP communication functionality with pure hardware logic without CPU!

The 【UDP10G IP Core】 is a groundbreaking solution that allows UDP transmission and reception processing to be implemented solely with pure hardware logic, without the need for a CPU. It also supports high-speed simultaneous transmission and reception. This can help shorten the development time for network application products that require broadcasting and low latency. Additionally, we have prepared demo files for Xilinx/Intel FPGA evaluation boards, so you can evaluate and test this core on actual hardware before purchasing.

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UDP10G-block-X.jpg

UDP 10G IP core for FPGA

UDP10G-block-X.jpg
UDP10G-block-X.jpg
  • Related Link - http://www.dgway.com/UDP10G-IP_X.html

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basic information

◇Complete hard logic UDP/IP stack ◇Supports IPv4 ◇Configurable send/receive buffer size ◇User-friendly interface (data I/F is FIFO type, control I/F is register type) ◇Core can be evaluated on genuine Xilinx/Intel evaluation boards before purchase ◇Includes a reference project that operates on actual hardware, with all source code provided except for the core ◇Reliable domestic support

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Delivery Time

P3

※It is necessary to conclude a license agreement.

Applications/Examples of results

The UDP10G IP core is the ideal solution for network applications that require broadcasting and low latency.

Line up(4)

Model number overview
UDP10G-IP-KT7 UDP10G-IP compatible with Kintex-7
UDP10G-IP-VT7 UDP10G-IP compatible with Virtex-7
UDP10G-IP-ZQ7 UDP10G-IP compatible with Zynq-7000
UDP10G-IP-KU UDP10G-IP compatible with Kintex Ultrascale

catalog(3)

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Design Gateway Comprehensive Catalog (Intel Version)

Design Gateway Comprehensive Catalog (Intel Version)

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Design Gateway Comprehensive Catalog (Xilinx Edition)

Design Gateway Comprehensive Catalog (Xilinx Edition)

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CPU Low Latency High-Speed Network IP Core [TOE-IP/UDP-IP] Catalog

CPU Low Latency High-Speed Network IP Core [TOE-IP/UDP-IP] Catalog

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デザイン・ゲートウェイ

デザイン・ゲートウェイ

Information and Communications

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Design Gateway is a pioneer in the development and sales of advanced IP cores, with over 30 years of experience in the FPGA industry.

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